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Chapter A: Wire Bonding
A1. Level 1. Introduction of wirebonding technology Print this section in .pdf format by clicking the linkThis guideline is concerned with wirebonding technology, which affords the fundamental knowledge and the practical applications to those who are using this technique as well as those who are interested in this technique. This guideline is divided into different levels according to readers requirements. A1.1 What is wirebondingWirebonding is an electrical interconnection technique using thin wire and a combination of heat, pressure and/or ultrasonic energy. Wirebonding is a solid phase welding process, where the two metallic materials (wire and pad surface) are brought into intimate contact. Once the surfaces are in intimate contact, electron sharing or interdiffusion of atoms takes place, resulting in the formation of wirebond. In wirebonding process, bonding force can lead to material deformation, breaking up contamination layer and smoothing out surface asperity, which can be enhanced by the application of ultrasonic energy. Heat can accelerate Interatomic diffusion, thus the bond formation. A1.1.1 Wirebonding processesWirebonding process begins by firmly attaching the backside of a chip to a chip carrier using either an organic conductive adhesive or a solder (Die Attach). The wires then are welded using a special bonding tool (capillary or wedge). Depending on bonding agent (heat and ultrasonic energy), the bonding process can be defined to three major processes: thermocompression bonding (T/C), ultrasonic bonding (U/S), and thermosonic bonding (T/S), as shown in Table A1. Table A1. Three wirebonding processes.
A1.1.2 Wirebond forms There are two basic forms of wirebond: ball bond (Figure A1) and wedge bond (Figure A2), the corresponding bonding technique, bonding tool and materials are listed in Table A2. Currently, thermosonic gold ball bonding is the most widely used bonding technique, primarily because it is faster than ultrasonic aluminum bonding. Once the ball bond is made on the device, the wire may be moved in any direction without stress on the wire, which greatly facilitates automatic wire bonding, as the movement need only be in the x and y directions. Figure A1. Ball bond (after APROVA Bonding tool).
Figure A2. Wedge bond (after K&S Micro-Swiss).
Table A2. Wirebond formation.
A1.3 History and applications Wirebonding is the earliest technique of device assembly, whose first result was published by Bell Laboratories in 1957. Sine then, the technique has been extremely developed:
As a result, a reliable and completely repeatable bond formation process can be produced. Owing to its potentially low cost, its much improved yields and reliability, wirebonding, as the dominant chip-connection technology, has been used with all styles of microelectronic packages, from small individual chip packages to large, high-density multichip modules. The most popular applications that use wirebonding are:
Figure A3. Chip interconnection using wirebonding technology (after Ericsson Microwave System AB). Virtually all dynamic random access memory (DRAM) chips and most commodity chips in plastic packages are assembled by wirebonding. About 1.2-1.4 trillion wire interconnections are produced annually. Manufacturing losses and test failures are about 40-1000 ppm and trending downward each year. It is believed that wirebonding will continue to dominate memory and commodity packaging requiring relatively small I/O counts (< 500 I/O) in the future. In addition, wirebonding method is used to connect other components, such as resistors or capacitors, to substrate, package terminals to substrate, or one substrate to another. A1.4 Cost The main cost of wirebonding method includes:
Wirebonding is a low cost process since:
Cost analysis should include volume and individual process cycle time predictions. In some cases, the cost associated with the flexibility required for engineering and product design charges, which occur and should be anticipated as a part of the planing cycle, also should be evaluated.
A1.5 Limitation of wirebonding For the application of wirebonding method, terminals of chips have to be arranged at the periphery of the chips, otherwise short circuit is easily caused. Therefore, wirebonding technique is difficult for high I/O (>500) interconnections.
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